Summary form only given. It is increasingly clear that performance and capacity improvements predicated on Moore’s law will not be sufficient to meet projected overall capacity demands in anetworked society – in fact more than Moore will be needed. One way to meet these demands is enabled by 2.5D and 3D integration on chip-level. In this note we discuss technical and financial drivers of 2.5/3D from a system integration perspective. Further trends and different approaches in this field are discussed with pros and cons as well with technical and business model challenges.
The note also touches on how these integration techniques can be even further strengthened when combined with on-chip or “near-chip” integration of photonics. This combination seems to have the potential to deliver technologies that can meet future capacity and performance requirements given other technical constraints e.g. power consumption.